Design of a radix-8/4/2 FFT processor for OFDM systems

The FFT processor is a very important component in Orthogonal Frequency Division Multiplexing(OFDM) communication system. In this paper, we propose an efficient variable-length radix-8/4/2 FFT architecture for OFDM systems. The FFT processor is based on radix-8 FFT algorithm and also supports radix-4 or radix-2 FFT computation. The pipelined radix-8/4/2 butterfly unit computes radix-8 FFT algorithm basically. For the limitation of FFT length, if it cannot run radix-8 FFT algorithm at the last stage then it computes radix-4 or radix-2 FFT algorithm. Furthermore, proposed FFT architecture use shared-memory to minimize and simplify hardware. We are using efficient In-place memory access method to maintain conflict-free data access and minimize memory size. Also we replace a very large lookup table with a twiddle factor generator which consumes less area then a ROM-based lookup table. The proposed FFT processor performs variable-length FFT including 64, 256, 512, 1024, 2048, 4096 and 8192 points which cover all the required FFT lengths used in 802.11a, 802.16a, DAB, DVB-T, VDSL and ADSL.